A Passive-Matched 22 GHz 2.6-dB-NF CMOS Front-End with a 70-800 ps Delay Block

Apratim Roy


This paper presents a power-efficient RF differential receiver front-end supporting transmitted-reference (TR) communication in a 90 nm CMOS technology. Particularly, it addresses the issues of designing the frontend amplifier with low-noise and passive matching circuits on a silicon process and integrating a low-power delay unit in the front-end with wideband characteristics. The proposed architecture includes a differential high simulated gain (11 dB) amplifier which is centered at 21.6 GHz (in the K-Band) with a 6.2 GHz bandwidth (18.1~24.3 GHz). The input and output reflection parameters have centered values around -26 and -18 dB, respectively. With noise matching, the amplifier achieves 2.6~2.9 dB bandwidth noise-figure and 2 dBm input power limit for linear coverage. To interface the amplifier with a following RF mixer, a submicron delay-block (DB) is proposed with provision of adjusting number of stages in the delay chain. The branched DB architecture achieves monotonic delays covering a range of 70-800 ps (including group-dispersion). Tweaking of delay is possible through four design parameters and the set-up is analyzed by extending the number of cascaded stages up to eight. Driven from a 1.2 V supply, the amplifier and the DB consume 13.9 and 8.52- 10.61 mW power, respectively, and realize the circuits for the TR front-end. When compared with simulated results of reported CMOS receivers, the proposed design delivers higher performance in terms of a microwave figure-of-merit.

Full Text:



M. Sun, Y. P. Zhang, G. X. Zheng, W.-Y. Yin, ``Performance of Intra-Chip Wireless Interconnect Using On-Chip Antennas and UWB Radios,`` IEEE Trans. Antennas and Propagation, Vol. 57, No. 9, pp. 2756-2762, Sept. 2009.

I.E. Lager, A.T. De Hoop, ``Inter-chip and intra-chip pulsed signal transfer between transmitting and receiving loops in wireless interconnect configurations,`` in Proc. European Microwave Conf., pp. 577-580, Sept. 2010.

M.F. Chang, V. Roychowdhury, L. Zhang, H. Shin, Y. Qian, ``RF/wireless interconnect for inter- and intra-chip communications,`` Proceedings of the IEEE, Vol. 89, No. 4, pp. 456-466, Apr 2001.

W. Malik, C. Stevens, D. Edwards, ``Multipath Effects in Ultrawideband Rake Reception,`` IEEE Trans. Antennas and Propagation, Vol. 56, No. 2, pp. 507-514, Feb. 2008.

Rashid H., Watanabe S., Kikkawa T.: "Characteristics of Si Integrated Antenna for Inter-chip Wireless Interconnection', Japanese Journal of Applied Physics, 2004, 43, (4B), pp. 2283-2287.

Saha P. K., Sasaki N., T. Kikkawa: "A CMOS Monocycle Pulse Generation Circuit in a Ultra- Wideband Transmitter for Intra/Inter Chip Wireless Interconnection'. Japanese Journal of Applied Physics, 2005, 44, (4B), pp. 2104-2108.

Goeckel D.L., Qu Z.: "Slightly frequency-shifted reference ultra-wideband (UWB) radio: TR-UWB without the delay element', Proc. Military Communications Conference, MILCOM, 2005, pp. 3029-3035.

Roy S., Forester J.R., Somayazulu V.S., Leeper D.G.: 'Ultrawideband radio design: the promise of high speed, shortrange wireless connectivity,' Proc. of the IEEE, 2004, 92, (2), pp. 295-311.

FCC regulation on ultra-wideband radio. [online]. Available: http://hraunfoss.fcc.gov/edocs public/attachmatch/FCC-02- 48A1.pdf, accessed June 2011.

Hoctor R. T., Tomlinson H. W.: "Delay-Hopped, Transmitted Reference RF Communications,' Proc. IEEE Conf. On UWB Systems and Technologies, 2002, pp. 265-270.

Casu M.R., Durisi G.: 'Implementation aspects of a transmitted-reference UWB receiver', Journal of Wireless Communications and Mobile Computing, 2005, 5, (5), pp. 551 - 566.

H. K. Chiou, H. Y. Liao, K. C. Liang, Compact and low power consumption K-band differential low-noise amplifier design using transformer feedback technique, IET Microwaves, Antennas and Propagation, vol.2, no.8, pp.871-879, Dec. 2008.

Leung B.: "VLSI for Wireless Communication', (Prentice Hall India, New Delhi, 2002, 1st Ed.).

D. K. Shaeffer and T. H. Lee, ``A 1.5-V, 1.5-GHz CMOS low noise amplifier,`` IEEE J. Solid-State Circuits, vol. 32, no. 5, pp. 745-759, May 1997.

T. K. Nguyen, C. H. Kim, G. J. Ihm, M. S.Yang, and S. G. Lee, ``CMOS low-noise amplifier design optimization techniques,`` IEEE Trans. Microw. Theory Tech., vol. 52, no. 5, pp. 1433-1442, May 2004.

A. van der Ziel, ``Noise in solid-state devices and lasers,`` Proc. IEEE, vol. 58, no. 8, pp. 1178-1206, Aug. 1970.

D. K. Shaeffer and T. H. Lee, ``Comment on Corrections to a 1.5-V, 1.5-GHz CMOS low noise amplifier,`` IEEE J. Solid-State Circuits, vol. 41, no. 10, pp. 2359-2359, Oct. 2006.

H. Samavati, H. R. Rategh, and T. H. Lee, ``A 5-GHz CMOS wireless LAN receiver front-end,`` IEEE J. Solid-State Circuits, vol. 35, no. 5, pp. 765-772, May 2000.

Rashid S, Roy A, Ali N, Rashid H., Design of a 21 GHz UWB Differential Low Noise Amplifier using .13 m CMOS Process., Proc. of 12th Int. Symp. on Integrated Circuits, 2009, p. 538-41.

Eto S., Akita H., Isobe K., Tsuchida K., Toda H., Seki T.: "A 333MHz, 20mW, 18ps resolution digital DLL using current controlled delay with parallel variable resistor DAC (PVR-DAC),' Proc. 2nd IEEE Asia Pacific Conf. on ASIC, 2000, pp. 349–350.

Terada T., Yoshizumi S., Sanada Y., Kuroda T.: "Transceiver circuits for pulse based ultra-wideband,' Proc. of International Symposium on Circuits and Systems, 4, May 2004, pp. 349-352.

Roy A., Rashid S., Arafat M.A., Rashid H.: 'Design of a Wideband Delay Element for Transmitted Reference UWB Receivers', Proc. Int. Conf. on Electrical and Computer Eng. ICECE, December 2010, pp. 97-100.

Rabaey J.M., Chandrakasan A., Nikolic B.: "Digital integrated circuits: A design perspective'. (Prentice-Hall India, New Delhi, 2nd ed., 2003)

N. R. Mahapatra, A. Tareen, S. V. Garimella, Comparison and Analysis of Delay Elements. Proc. 45th Midwest Symposium on Circuits and Systems, Aug. 2002. p. 473-476.

Guo X, O KK, A Power Efficient Differential 20GHz Low Noise Amplifier With 5.3GHz 3dB Bandwidth. IEEE microwave and wireless components letters, 2005; 15:603-5.

Yu YH, Chen Y, Heo D, A 0.6-V low power UWB CMOS LNA, IEEE Microw. Wireless Compon. Lett. 2007; 17:229- 31.

Zhang F, Kinget FR. Low-power programmable gain CMOS DA. IEEE J. Solid-State Circuits 2006, 41:1333-43.

Wang RL, Lin MC, Yang CF, Lin CC. A 1 V 3.1-10.6 GHz full-band cascoded UWB LNA with resistive feedback. Proc. of IEEE EDSSC Conf., 2007, p. 1021-23.

B. Welch et al., 'A 20-GHz low-noise amplifier with active balun in a 0.25. m SiGe BICMOS technology', IEEE J. Solid-State Circuits, vol. 40, no.10, pp. 2092-2097, Oct. 2005.

S. C. Baakmeer, E. A. M. Klumperink, B. Nauta, and D. M. W. Leenaerts, 'An inductorless wideband balun-LNA in 65 nm CMOS with balanced output,' in Proc. ESSCIRC, 2007, pp. 364-367.

T. Chang, J. Chen, L. Rigge, and J. Lin, 'A packaged and ESD-protected inductorless 0.18 GHz wideband CMOS LNA,' IEEE Microw. Wireless Compon. Lett., vol. 18, no. 6, pp. 416-418, Jun. 2008.

S. Woo, W. Kim, C.-H. Lee, K. Lim, and J. Laskar, 'A 3.6 mW differential common-gate CMOS LNA with positivenegative feedback,' in IEEE ISSCC Dig., 2009, pp. 218219.

DOI: http://dx.doi.org/10.1590/S2179-10742013000100014


  • There are currently no refbacks.

© Copyright 2007-2016 JMOe Brazilian Microwave and Optoelectronics Society (SBMO) and Brazilian Society of Electromagnetism (SBMag)